Research Papers: Flows in Complex Systems

Hydrodynamic Investigation of a Wafer Rinse Process Through Numerical Modeling and Flow Visualization Methods

[+] Author and Article Information
Chia-Yuan Chen

Department of Mechanical Engineering,
National Cheng Kung University,
Tainan 701, Taiwan
e-mail: chiayuac@mail.ncku.edu.tw

Bivas Panigrahi

Department of Mechanical Engineering,
National Cheng Kung University,
Tainan 701, Taiwan
e-mail: n18047068@mail.ncku.edu.tw

Kok-Shen Chong

Fab-14 Diffusion Engineering Department 1,
Taiwan Semiconductor Manufacturing
Company (TSMC),
Tainan 741, Taiwan
e-mail: chongsam01@gmail.com

Wei-Hsien Li

Fab-14 Diffusion Engineering Department 1,
Taiwan Semiconductor Manufacturing
Company (TSMC),
Tainan 741, Taiwan
e-mail: whli@tsmc.com

Yi-Li Liu

Fab-14 Diffusion Engineering Department 1,
Taiwan Semiconductor Manufacturing
Company (TSMC),
Tainan 741, Taiwan
e-mail: ylliur@tsmc.com

Tsung-Yi Lu

Department of Mechanical Engineering,
National Cheng Kung University,
Tainan 701, Taiwan
e-mail: n16051126@mail.ncku.edu.tw

1Corresponding author.

Contributed by the Fluids Engineering Division of ASME for publication in the JOURNAL OF FLUIDS ENGINEERING. Manuscript received August 11, 2017; final manuscript received January 30, 2018; published online April 10, 2018. Assoc. Editor: Hui Hu.

J. Fluids Eng 140(8), 081106 (Apr 10, 2018) (8 pages) Paper No: FE-17-1493; doi: 10.1115/1.4039368 History: Received August 11, 2017; Revised January 30, 2018

In the current semiconductor industrial scenario, wafers are rinsed in an overflow rinsing tank while being mounted on several lifters prior to most of its manufacturing processes. However, a major drawback of this overflow rinsing methodology is that some of the processing fluid stagnates due to the generated vortices in the regions between the side and middle lifters which entrap some of the flushed particles that further adhere and deteriorate the surface of the wafers. In this work, the hydrodynamics of the flow field inside the wafer rinsing tank with this original lifter orientation setup was studied and compared through numerical simulation and flow visualization using particle image velocimetry (PIV) method, and a strong agreement was found between them in terms of velocity calculation. A new lifter orientation setup was initiated and it was evidenced by the numerical simulation that with this new setup, the generated vortices which are situated opposite to the lifters tilting direction can be displaced significantly in terms of magnitude and distribution. This work presents a new wafer cleaning concept which shows its great potentials in improvement and implementation to the current in-line wafer batch fabrication process without modifying the original design of the rinsing tank.

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Grahic Jump Location
Fig. 1

Schematic representation of wafer rinsing tank along with 2D PIV configuration

Grahic Jump Location
Fig. 2

(a) Geometry of the wafer rinsing tank and the sliced wafer rinsing tank. All dimensions are in millimeter. (b) Specific zones of interest and the generated grids in the computation domain. (c) The first, second, and third rows depict different orientation changes of side and middle lifters.

Grahic Jump Location
Fig. 3

(a) Contours of velocity magnitude superimposed with streamlines at the midvertical plane of the sliced wafer rinsing tank with the original lifter setting. (b) Velocity profile at different axial locations (Z1 location; Z* = 0.25, Z2 location; Z* = 0.50, and Z3 location; Z* = 0.75) of the sliced wafer rinsing tank.

Grahic Jump Location
Fig. 4

(a) Velocity contour of the selected regions between the side and middle lifters obtained by PIV methodology and (b) comparison graph of the velocity magnitude obtained from the experiment and simulation. The correlation coefficient between PIV and CFD is 0.85 illustrating high degree of similarity between both the data sets. The error bar shows one standard deviation over three measurements along three axial locations highlighted in white dashed lines.

Grahic Jump Location
Fig. 6

Velocity contours of the sliced wafer rinsing tank superimposed with streamlines at the midvertical plane of the sliced wafer rinsing tank with the modified middle lifter setting. The middle lifter is tilted at an angle of (a) 30-deg, (b) 45-deg, and (c) 60-deg, respectively, both in counterclockwise (left column) and clockwise direction (right column).

Grahic Jump Location
Fig. 5

Velocity contours of the sliced wafer rinsing tank superimposed with streamlines at the midvertical plane of the sliced wafer rinsing tank with modified side lifter setting. The side lifters tilted at an angle of (a) 30-deg, (b) 45-deg, (c) 60-deg, and (d) 90-deg, respectively.



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