This paper reports the experimental findings of void formation in eutectic and lead-free solder joints of flip-chip assemblies. A previous theory indicated that the formation of voids is determined by the direction of heating. The experiments were designed to examine the size and location of voids in the solder samples subject to different heat flux directions. A lead-free solder (Sn-3.5Ag-0.75Cu) and a eutectic solder (63Sn37Pb) were employed in the experiments. Previous experiments [Wang, D., and Panton, R. L., 2005, “Experimental Study of Void Formation in High-Lead Solder Joints of Flip-Chip Assemblies,” ASME J. Electron. Packag., 127(2), pp. 120–126; 2005, “Effect of Reversing Heat Flux Direction During Reflow on Void Formation in High-Lead Solder Bumps,” ASME J. Electron. Packag., 127(4), pp. 440–445] employed a high lead solder. 288 solder bumps were processed for each solder. Both eutectic and lead-free solder have shown fewer voids and much smaller void volume than those for high-lead solder. Compared with lead-free solder, eutectic solder has a slightly lower void volume and a lower percentage of defective bumps. For both eutectic and lead-free solders, irrespective of the cooling direction, heating solder samples from the top shows fewer defective bumps and smaller void volume. No significant effect on void formation for either eutectic or lead-free solder was found via reversing the heat flux direction during cooling. Unlike high-lead solder, small voids in eutectic or lead-free solder comprised 35-88% of the total void volume. The final distribution of voids shows a moderate agreement with thermocapillary theory, indicating the significance of the temperature gradient on the formation of voids.

1.
Lau
,
J. H.
, and
Pao
,
Y.-H.
, 1997,
Solder Joint Reliability of BGA, CSP, Flip Chip, and Fine Pitch SMT Assemblies
,
McGraw-Hill
New York
, Chap. 6.
2.
Wang
,
D.
, and
Panton
,
R. L.
, 2005, “
Experimental Study of Void Formation in High-Lead Solder Joints of Flip-Chip Assemblies
,”
ASME J. Electron. Packag.
1043-7398,
127
(
2
), pp.
120
126
.
3.
Wang
,
D.
, and
Panton
,
R. L.
, 2005, “
Effect of Reversing Heat Flux Direction during Reflow on Void Formation in High-Lead Solder Bumps
,”
ASME J. Electron. Packag.
1043-7398,
127
(
4
), pp.
440
445
.
4.
Chiu
,
C. S.
, and
Lee
,
N. C.
, 1997, “
Voiding in BGA at Solder Bumping Stage
,”
ISHM Proceedings of Microelectronics and Packaging Conference
, Philadelphia, PA, pp.
462
471
.
5.
Chan
,
Y. C.
,
Xie
,
D. J.
, and
Lai
,
J. K. L.
, 1995, “
Characteristics of Porosity in Solder Pastes during Infrared Reflow Soldering
,”
J. Mater. Sci.
0022-2461,
30
(
21
), pp.
5543
5550
.
6.
Goenka
,
L.
, and
Achari
,
A.
, 1995, “
Void Formation in Flip-Chip Solder Bumps—Part I
,”
Proceeding of the 18th IEEE/CPMT Symposium
, Austin, TX, pp.
14
19
.
7.
Bailey
,
C.
,
Lu
,
H.
, and
Wheeler
,
D.
, 2002, “
Computational Modeling Techniques for Reliability of Electronic Components on Printed Circuit Boards
,”
Appl. Numer. Math.
0168-9274,
40
, pp.
101
117
.
8.
Goenka
,
L.
, and
Achari
,
A.
, 1996, “
Void Formation in Flip Chip Solder Bumps—Part II
,”
Proceeding of the 19th IEEE/CPMT Symposium
, Austin, TX, pp.
430
437
.
9.
Panton
,
R. L.
,
Lee
,
J. W.
,
Goenka
,
L.
, and
Achari
,
A.
, 2003, “
Simulation of Void Growth in Molten Solder Bumps
,”
ASME J. Electron. Packag.
1043-7398,
125
(
3
), pp.
329
334
.
You do not currently have access to this content.