Abstract
With the development of semiconductor technology, traditional flip-chip bonding has been difficult to meet the high-density, high-reliability requirements of advanced packaging technology. As an advanced three-dimensional stacked packaging technology, Cu-SiO2 hybrid bonding technology can achieve high-density electrical interconnection without bumps, which expands the transmission performance and interconnection density of chips greatly. However, the investigation on Cu-SiO2 bonding is far from mature, and many researchers are studying Cu-SiO2 bonding passionately. There are many technologies that use different bonding mechanisms to achieve Cu-SiO2 bonding, which will affect the bonding strength directly. We review the mechanism and research progress of Cu-Cu bonding, SiO2-SiO2 bonding. What is more, we summarize the comparison of bonding conditions and bonding strength of various methods furtherly. According to the bonding mechanism, we propose some economical solutions for low-temperature Cu-SiO2 hybrid bonding, with the aim of providing certain references for the further development of advanced semiconductor packaging.
References
1.
Arnaud
,
L.
,
Karam
,
C.
,
Bresson
,
N.
,
Dubarry
,
C.
,
Borel
,
S.
,
Assous
,
M.
,
Mauguen
,
G.
,
Fournel
,
F.
,
Gottardi
,
M.
,
Mourier
,
T.
,
Cheramy
,
S.
, and
Servant
,
F.
, 2020
, “
Three-Dimensional Hybrid Bonding Integration Challenges and Solutions Toward Multi-Wafer Stacking
,” MRS Commun.
,
10
(4
), pp. 549
–557
.10.1557/mrc.2020.772.
Luisier
,
M.
,
Lundatorm
,
M.
,
Antoniadis
,
D. A.
, and
Bokor
,
J.
, 2011
, “
Ultimate Device Scaling: Intrinsic Performance Comparisons of Carbon-Based, InGaAs, and Si Field-Effect Transistors for 5 nm Gate Length
,” International Electron Devices Meeting (IEDM
), Washington, DC, Dec. 5–7, pp. 251
–254
.10.1109/IEDM.2011.61315313.
Sharma
,
G.
,
Rao
,
V. S.
,
Kumar
,
A.
,
Ying
,
L. Y.
,
Houe
,
K. C.
,
Lim
,
S.
,
Sekhar
,
V. N.
,
Rajoo
,
R.
,
Kripesh
,
V.
, and
Lau
,
J. H.
, 2011
, “
Design and Development of Multi-Die Laterally Placed and Vertically Stacked Embedded Micro-Wafer-Level Packages
,” IEEE Trans. Compon. Packag. Manufact. Technol.
,
1
(1
), pp. 52
–59
.10.1109/TCPMT.2010.21014704.
Robertazzi
,
R.
,
Scheurman
,
M.
,
Wordeman
,
M.
,
Tian
,
S.
, and
Tyberg
,
C.
, 2017
, “
Analytical Test of 3D Integrated Circuits
,” IEEE International Test Conference (ITC
), Fort Worth, TX, Oct. 31–Nov. 2, pp. 1
–10
.10.1109/TEST.2017.82420675.
Kim
,
J. S.
,
Jung
,
S. B.
, and
Yoon
,
J. W.
, 2021
, “
Effect of Ni (P) thickness in Au/Pd/Ni (P) surface Finish on the Electrical Reliability of Sn-3.0Ag-0.5Cu Solder Joints During Current-Stressing
,” J. Alloys Compd.
,
850
, p. 156729
.10.1016/j.jallcom.2020.1567296.
William
,
S.
, 1962
, “
Semiconductive Wafer and Method of Making the Same
,” U.S. Patent No. US3044909
.https://patents.google.com/patent/US3044909A/en7.
Moffat
,
T. P.
, and
Josell
,
D.
, 2012
, “
Extreme Bottom-Up Superfilling of Through-Silicon-Vias by Damascene Processing: Suppressor Disruption, Positive Feedback and Turning Patterns
,” J. Electro Chem. Soc.
,
159
(4
), pp. D208
–D216
.10.1149/2.040204jes8.
Chang
,
H. H.
,
Shih
,
Y. C.
,
Hsiao
,
Z. C.
,
Chiang
,
C. W.
,
Chen
,
Y. H.
, and
Chiang
,
K. N.
, 2009
, “
3D Stacked Chip Technology Using Bottom-Up Electroplated TSVs
,” IEEE 59th Electronic Components and Technology Conference (ECTC
), San Diego, CA, May 26–29, pp. 1177
–1184
.10.1109/ECTC.2009.50741619.
Tian
,
Y.
,
Fang
,
H.
,
Ren
,
N.
,
Zhao
,
Y. T.
,
Chen
,
B. L.
,
Wu
,
F. S.
, and
Paik
,
K. W.
, 2020
, “
Reliable Single-Phase Micro-Joints With High Melting Point for 3D TSV Chip Stacking
,” J. Alloys Compd.
,
828
, p. 154468
.10.1016/j.jallcom.2020.15446810.
Huylenbroeck
,
S. V.
,
Li
,
Y. L.
,
Heylen
,
N.
,
Croes
,
K.
,
Beyer
,
G.
,
Beyne
,
E.
,
Brouri
,
M.
,
Gopinath
,
S.
,
Nalla
,
P.
,
Thorum
,
M.
,
Meshram
,
P.
,
Anjos
,
D. M.
, and
Yu
,
J. Y.
, 2015
, “
Advanced Metallization Scheme for 3 × 50μm Via Middle TSV and Beyond
,” IEEE 65th Electronic Components and Technology Conference (ECTC
), San Diego, CA, May 26–29, pp. 66
–72
.10.1109/ECTC.2015.715957311.
Pan
,
Y. X.
,
Li
,
F.
,
He
,
H.
,
Li
,
J. H.
, and
Zhu
,
W. H.
, 2017
, “
Effects of Dimension Parameters and Defect on TSV Thermal Behavior for 3D IC Packaging
,” Microelectron. Reliab.
,
70
, pp. 97
–102
.10.1016/j.microrel.2017.02.00112.
Gagnard
,
X.
, and
Mourier
,
T.
, 2010
, “
Through Silicon Via: From the CMOS Imager Sensor Wafer Level Package to the 3D Integration
,” Microelectron. Eng.
,
87
(3
), pp. 470
–476
.10.1016/j.mee.2009.05.03513.
Khan
,
N. H.
,
Alam
,
S. M.
, and
Hassoun
,
S.
, 2011
, “
Power Delivery Design for 3-D ICs Using Different Through-Silicon Via (TSV) Technologies
,” IEEE Trans. Very Large Scale Integration (VLSI) Syst.
,
19
(4
), pp. 647
–658
.10.1109/TVLSI.2009.203816514.
Wang
,
Q.
,
Wen
,
J.
,
Ravindranath
,
B.
,
O′Sullivan
,
A. W.
,
Catherall
,
D.
,
Li
,
K.
,
Wei
,
S. Y.
,
Komarov
,
S.
, and
Tai
,
Y. C.
, 2015
, “
A Compact High Resolution Flat Panel PET Detector Based on the New 4-Side Buttable MPPC for Biomedical Applications
,” Nucl. Instrum. Methods Phys. Res. Sect.: A
,
94
, pp. 151
–159
.10.1016/j.nima.2015.04.07115.
Lau
,
J. H.
,
Zhang
,
Q. L.
,
Li
,
M.
,
Yeung
,
K. M.
,
Cheung
,
Y. M.
,
Fan
,
N.
,
Wong
,
Y. M.
,
Zahn
,
M.
, and
Koh
,
M.
, 2015
, “
Stencil Printing of Underfill for Flip Chips on Organic-Panel and Si-Wafer Substrates
,” IEEE Trans. Compon., Packag. Manuf. Technol.
,
5
(7
), pp. 1027
–1035
.10.1109/TCPMT.2015.244384116.
Kagawa
,
Y.
,
Fujii
,
N.
,
Aoyagi
,
K.
,
Kobayashi
,
Y.
,
Nishi
,
S.
,
Todaka
,
N.
,
Takeshita
,
S.
,
Taura
,
J.
,
Takahashi
,
H.
,
Nishimura
,
Y.
,
Tatani
,
K.
,
Kawamura
,
M.
,
Nakayama
,
H.
,
Nagano
,
T.
,
Ohno
,
K.
,
Iwamoto
,
H.
,
Kadomura
,
S.
, and
Hirayama
,
T.
, 2016
, “
Novel Stacked CMOS Image Sensor With Advanced Cu2Cu Hybrid Bonding
,” IEEE International Electron Devices Meeting (IEDM
), San Francisco, CA, Dec. 3–7, pp. 208
–211
.10.1109/IEDM.2016.783837517.
Kagawa
,
Y.
,
Fujii
,
N.
,
Aoyagi
,
K.
,
Kobayashi
,
Y.
,
Nishi
,
S.
,
Todaka
,
N.
,
Takeshita
,
S.
,
Taura
,
J.
,
Takahashi
,
H.
,
Nishimura
,
Y.
,
Tatani
,
K.
,
Kawamura
,
M.
,
Nakayama
,
H.
,
Ohno
,
K.
,
Iwamoto
,
H.
,
Kadomura
,
S.
, and
Hirayama
,
T.
, 2018
, “
An Advanced CuCu Hybrid Bonding for Novel Stacked CMOS Image Sensor
,” 2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM
), Kobe, Japan, Mar. 13–16, pp. 65
–67
.10.1109/EDTM.2018.842145318.
Kagawa
,
Y.
,
Hida
,
S.
,
Kobayashi
,
Y.
,
Takahashi
,
K.
,
Miyanomae
,
S.
,
Kawamura
,
M.
,
Kawashima
,
H.
,
Yamagishi
,
H.
,
Hirano
,
T.
,
Tatani
,
K.
,
Nakayama
,
H.
,
Ohno
,
K.
,
Iwamoto
,
H.
, and
Kadamura
,
S.
, 2019
, “
The Scaling of Cu-Cu Hybrid Bonding for High Density 3D Chip Stacking
,” Electron Devices Technology and Manufacturing Conference (EDTM
), Singapore, Mar. 12–15, pp. 297
–299
.10.1109/EDTM.2019.873118619.
Tanida
,
K.
,
Suzuki
,
S.
,
Seo
,
T.
,
Morinaga
,
M.
,
Korogi
,
H.
,
Tetani
,
M.
,
Hamada
,
M.
,
Eto
,
R.
,
Yamashita
,
T.
,
Kato
,
Y.
,
Sato
,
N.
,
Shimizu
,
T.
,
Hanawa
,
T.
,
Kubo
,
H.
,
Ueda
,
K.
,
Ito
,
F.
,
Noguchi
,
Y.
,
Nakamura
,
M.
,
Mizukoshi
,
R.
,
Takeuchi
,
M.
,
Suzuki
,
M.
,
Niisoe
,
N.
,
Miyanaga
,
I.
,
Ikeda
,
A.
, and
Matsumoto
,
S.
, 2022
, “
Pixel Pitch Hybrid Bonding and Three Layer Stacking Technology for BSI Image Sensor
,” IEEE International Interconnect Technology Conference (IITC
), San Jose, CA, June 27–30, pp. 5
–7
.10.1109/IITC52079.2022.988130520.
Kim
,
T.
,
Cho
,
S.
,
Hwang
,
S. K.
,
Lee
,
K.
,
Hong
,
Y.
,
Lee
,
H.
,
Cho
,
H.
,
Moon
,
K.
,
Na
,
H.
, and
Hwang
,
K.
, 2021
, “
Multi-Stack Wafer Bonding Demonstration Utilizing Cu to Cu Hybrid Bonding and TSV Enabling Diverse 3D Integration
,” IEEE 71st Electronic Components and Technology Conference (ECTC
), San Diego, CA, June 1–July 4, pp. 415
–419
.10.1109/ECTC32696.2021.0007621.
Chen
,
M. F.
,
Chen
,
F. C.
,
Chiou
,
W. C.
, and
Yu
,
D. C.
, 2019
, “
System on Integrated Chips (SoICTM) for 3D Heterogeneous Integration
,” IEEE 69th Electronic Components and Technology Conference (ECTC
), Las Vegas, NV, May 28–31, pp. 594
–599
.10.1109/ECTC.2019.0009522.
Chen
,
M. F.
,
Lin
,
C. S.
,
Liao
,
E. B.
,
Chiou
,
W. C.
,
Kuo
,
C. C.
,
Hu
,
C. C.
,
Tsai
,
C. H.
,
Wang
,
C. T.
, and
Yu
,
D.
, 2020
, “
SoIC for Low-Temperature, Multi-Layer 3D Memory Integration
,” IEEE 70th Electronic Components and Technology Conference (ECTC
), Orlando, FL, June 3–30, pp. 855
–860
.10.1109/ECTC32862.2020.0013923.
Yan
,
O. Y.
,
Yang
,
S. H.
,
Yin
,
D. D.
,
Huang
,
X.
,
Wang
,
Z. Q.
,
Yang
,
S. W.
,
Han
,
K.
, and
Xia
,
Z. Q.
, 2021
, “
Excellent Reliability of Xtacking™ Bonding Interface
,” IEEE International Reliability Physics Symposium (IRPS
), Monterey, CA, Mar. 21–25, pp. 1
–6
.10.1109/IRPS46558.2021.940511524.
Huo
,
Z. L.
,
Cheng
,
W. H.
, and
Yang
,
S.
, 2022
, “
Unleash Scaling Potential of 3D NAND With Innovative Xtacking® Architecture
,” IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
, Honolulu, HI, June 12–17, pp. 254
–255
.10.1109/VLSITechnologyandCir46769.2022.983028525.
Niu
,
D. M.
,
Li
,
S. C.
,
Wang
,
Y. H.
,
Han
,
W.
,
Zhang
,
Z.
,
Guan
,
Y. J.
,
Guan
,
T. C.
,
Sun
,
F.
,
Xue
,
F.
,
Duan
,
L. D.
,
Fang
,
Y. W.
,
Zheng
,
H. Z.
,
Jiang
,
X. P.
,
Wang
,
S.
,
Zuo
,
F. G.
,
Wang
,
Y. B.
,
Yu
,
B.
,
Ren
,
Q. W.
, and
Xie
,
Y.
, 2022
, “
184QPS/W 64 Mb/mm2 3D Logic-to-DRAM Hybrid Bonding With Process-Near-Memory Engine for Recommendation System
,” IEEE International Solid—State Circuits Conference (ISSCC
), San Francisco, CA, Feb. 20–26, pp. 1
–3
.10.1109/ISSCC42614.2022.973169426.
Sakakibara
,
M.
,
Ogawa
,
K.
,
Sakai
,
S.
,
Tochigi
,
Y.
,
Honda
,
K.
,
Kikuchi
,
H.
,
Wada
,
T.
,
Kamikubo
,
Y.
,
Miura
,
T.
,
Nakamizo
,
M.
,
Jyo
,
N.
,
Hayashibara
,
R.
,
Miyata
,
S.
,
Yamamoto
,
S.
,
Ota
,
Y.
,
Takahashi
,
H.
,
Taura
,
T.
,
Oike
,
Y.
,
Tatani
,
K.
,
Ezaki
,
T.
, and
Hirayama
,
T.
, 2018
, “
A 6.9-μm Pixel-Pitch Back-Illuminated Global Shutter CMOS Image Sensor With Pixel-Parallel 14-Bit Subthreshold ADC
,” IEEE J. Solid-State Circuits
,
53
(11
), pp. 3017
–3025
.10.1109/JSSC.2018.286394727.
Sakakibara
,
M.
,
Ogawa
,
K.
,
Sakai
,
S.
,
Tochigi
,
Y.
,
Honda
,
K.
,
Kikuchi
,
H.
,
Wada
,
T.
,
Kamikubo
,
Y.
,
Miura
,
T.
,
Nakamizo
,
M.
,
Jyo
,
N.
,
Hayashibara
,
R.
,
Furukawa
,
Y.
,
Miyata
,
S.
,
Yamamoto
,
S.
,
Ota
,
Y.
,
Takahashi
,
H.
,
Taura
,
T.
,
Oike
,
Y.
,
Tatani
,
K.
,
Nagano
,
T.
,
Ezaki
,
T.
, and
Hirayama
,
T.
, 2018
, “
A Back-Illuminated Global-Shutter CMOS Image Sensor With Pixel-Parallel 14b Subthreshold ADC
,” 2018 IEEE International Solid-State Circuits Conference (ISSCC
), San Francisco, CA, Feb. 11–15, pp. 80–82.10.1109/ISSCC.2018.831019328.
Elsherbini
,
A.
,
Jun
,
K.
,
Vreeland
,
R.
,
Brezinski
,
W.
,
Niazi
,
H. K.
,
Shi
,
Y.
,
Yu
,
Q.
,
Qian
,
Z. G.
,
Xu
,
J.
,
Liff
,
S.
,
Swan
,
J.
,
Yao
,
J. M.
,
Liu
,
P. L.
,
Pelto
,
C.
,
Rami
,
S.
,
Balankutty
,
A.
,
Fischer
,
P.
, and
Turkot
,
B.
, 2021
, “
Enabling Hybrid Bonding on Intel Process
,” IEEE International Electron Devices Meeting (IEDM
), San Francisco, CA, Dec. 11–16, pp. 34.3.1–34.3.4.10.1109/IEDM19574.2021.972058629.
Lsherbini
,
A.
,
Liff
,
S.
,
Swan
,
J.
,
Jun
,
K.
,
Tiagaraj
,
S.
, and
Pasdast
,
G.
, 2021
, “
Hybrid Bonding Interconnect for Advanced Heterogeneously Integrated Processors
,” IEEE 71st Electronic Components and Technology Conference (ECTC
), San Diego, CA, June 1–July 4, pp. 1014
–1019
.10.1109/ECTC32696.2021.0016630.
Park
,
J.
,
Lee
,
B.
,
Lee
,
H.
,
Lim
,
D.
,
Kang
,
J.
,
Cho
,
C.
,
Na
,
M.
,
Jin
,
I.
, et al., 2022
, “
Wafer to Wafer Hybrid Bonding for DRAM Applications
,” IEEE 72nd Electronic Components and Technology Conference (ECTC
), San Diego, CA, May 31–June 3, pp. 126
–129
.10.1109/ECTC51906.2022.0003031.
Wang
,
S. Z.
,
Zhang
,
H. H.
,
Tian
,
Z. Q.
,
Liu
,
T. J.
,
Sun
,
Y. M.
,
Zhang
,
Y. X.
,
Dong
,
F.
, and
Liu
,
S.
, 2022
, “
Optimization of Cu Protrusion of Wafer-to-Wafer Hybrid Bonding for HBM Packages Application
,” Mater. Sci. Semicond. Process.
,
152
, p. 107063
.10.1016/j.mssp.2022.10706332.
Fisher
,
D. W.
,
Knickerbocker
,
S.
,
Smith
,
D.
,
Katz
,
R.
,
Garant
,
J.
,
Lubguban
,
J.
,
Soler
,
V.
, and
Robson
,
N.
, 2020
, “
Face to Face Hybrid Wafer Bonding for Fine Pitch Applications
,” IEEE 70th Electronic Components and Technology Conference (ECTC
), Orlando, FL, June 3–30, pp. 595
–600
.10.1109/ECTC32862.2020.0009933.
Jang
,
E. J.
,
Kim
,
J. W.
,
Kim
,
B.
,
Matthias
,
T.
, and
Park
,
Y. B.
, 2011
, “
Annealing Temperature Effect on the Cu-Cu Bonding Energy for 3D-IC Integration
,” Met. Mater. Int.
,
17
(1
), pp. 105
–109
.10.1007/s12540-011-0214-034.
Niu
,
F. F.
,
Wang
,
X. B.
,
Yang
,
S. H.
,
Xu
,
S. J.
,
Zhang
,
Y. Y.
,
Suga
,
T.
, and
Wang
,
C. X.
, 2023
, “
Low-Temperature Cu/SiO2 Hybrid Bonding Based on Ar/H2 Plasma and Citric Acid Cooperative Activation for Multi-Functional Chip Integration
,” Appl. Surf. Sci.
,
648
, p. 159074
.10.1016/j.apsusc.2023.15907435.
Shigetou
,
A.
, and
Hosoda
,
N.
, 2022
, “
Low-Temperature Direct Hybrid Bonding of Polypropylene to Natural Rubber and Cu by Methyl Glycine Vapor-Assisted Vacuum Ultraviolet (MG-VUV) Method Without Vacuum
,” Mater. Lett.
,
323
, p. 132499
.10.1016/j.matlet.2022.13249936.
Ong
,
J. J.
,
Tran
,
D. P.
,
Chiu
,
W. L.
,
Yang
,
S. C.
,
Yu
,
M. H.
,
Shen
,
F. C.
,
Chang
,
H. H.
,
Lee
,
O. H.
,
Chiang
,
C. W.
,
Wang
,
C. H.
,
Wu
,
W. W.
, and
Chen
,
C.
, 2023
, “
Potassium Hydroxide Surface Modification for Low Temperature Cu/SiO2 Hybrid Bonding
,” Surf. Interfaces
,
40
, p. 103076
.10.1016/j.surfin.2023.10307637.
Grayson
,
A. C. R.
,
Cima
,
M. J.
, and
Langer
,
R.
, 2005
, “
Size and Temperature Effects on Ploy (Lactic-co-Glycolic Acid) Degradation and Microreservoir Device Performance
,” Biomaterials
,
26
(14
), pp. 2137
–2145
.10.1016/j.biomaterials.2004.06.03338.
Zhang
,
L.
,
Liu
,
Z. Q.
,
Chen
,
S. W.
,
Wang
,
Y. D.
,
Long
,
W. M.
,
Guo
,
Y. H.
,
Wang
,
S. Q.
,
Ye
,
G.
, and
Liu
,
W. Y.
, 2018
, “
Materials, Processing and Reliability of Low Temperature Bonding in 3D Chip Stacking
,” J. Alloys Compd.
,
750
, pp. 980
–995
.10.1016/j.jallcom.2018.04.04039.
Song
,
B.
,
Li
,
F. L.
,
Zhu
,
F. L.
, and
Liu
,
S.
, 2023
, “
High Reliability of Piezoresistive Pressure Sensors by Wafer to Wafer Direct Bonding at Room Temperature
,” Sens. Actuators A: Phys.
,
364
, p. 114834
.10.1016/j.sna.2023.11483440.
Lhostis
,
S.
,
Ayoub
,
B.
,
Frémont
,
H.
,
Moreau
,
S.
,
Mattei
,
J. G.
,
Lamontagne
,
P.
, and
Tournie
,
A.
, 2023
, “
Reliability of the Hybrid Bonding Level Using Submicrometric Bonding Pads
,” Microelectron. Reliab.
,
150
, p. 115189
.10.1016/j.microrel.2023.11518941.
Ayoub
,
B.
,
Lhostis
,
S.
,
Moreau
,
S.
,
Moreau
,
S.
,
Mukhtarov
,
A.
,
Frémont
,
H.
, and
Mattei
,
J. G.
, 2023
, “
Investigation Into Cu Diffusion at the Cu/SiO2 Hybrid Bonding Interface of 3D Stacked Integrated Circuits
,” Microelectron. Reliab.
,
143
, p. 114934
.10.1016/j.microrel.2023.11493442.
Liu
,
C.-M.
,
Lin
,
H.-W.
,
Huang
,
Y.-S.
,
Chu
,
Y.-C.
,
Chen
,
C.
,
Lyu
,
D.-R.
,
Chen
,
K.-N.
, and
Tu
,
K.-N.
, 2015
, “
Low-Temperature Direct Copper-to-Copper Bonding Enabled by Creep on (111) Surfaces of Nanotwinned Cu
,” Sci. Rep.
,
5
(1
), pp. 1
–11
.10.1038/srep0973443.
Yu
,
M. H.
,
Ong
,
J. J.
,
Tran
,
D. P.
,
Chiu
,
W. L.
,
Hsu
,
W. Y.
,
Lin
,
H. E.
,
Chen
,
Y. A.
,
Tseng
,
H. H.
,
Shen
,
G. Y.
,
Yang
,
S. C.
, and
Chen
,
C.
, 2023
, “
Low Temperature Cu/SiO2 Hybrid Bonding Via <111> Oriented Nanotwinned Cu With Ar Plasma Surface
,” Appl. Surf. Sci.
,
636
, p. 157854
.10.1016/j.apsusc.2023.15785444.
Han
,
H.
,
Lee
,
C.
,
Kim
,
Y.
,
Lee
,
J.
,
Kim
,
R.
,
Kim
,
J.
, and
Yoo
,
B.
, 2021
, “
Cu to Cu Direct Bonding at Low Temperature With High Density Defect in Electrodeposited Cu
,” Appl. Surf. Sci.
,
550
, p. 149337
.10.1016/j.apsusc.2021.14933745.
Wang
,
Y.
,
Huang
,
Y. T.
,
Liu
,
Y. X.
,
Feng
,
S. P.
, and
Huang
,
M. X.
, 2022
, “
Thermal Instability of Nanocrystalline Cu Enables Cu-Cu Direct Bonding in Interconnects at Low Temperature
,” Scr. Mater.
,
220
, p. 114900
.10.1016/j.scriptamat.2022.11490046.
Chou
,
T.-C.
,
Yang
,
K.-M.
,
Li
,
J.-C.
,
Yu
,
T.-Y.
,
Yang
,
Y.-T.
,
Hu
,
H.-W.
,
Liu
,
Y.-W.
,
Ko
,
C.-T.
,
Chen
,
Y.-H.
,
Tseng
,
T.-J.
, and
Chen
,
K.-N.
, 2020
, “
Investigation of Pillar-Concave Structure for Low Temperature Cu–Cu Direct Bonding in 3D/2.5D Heterogeneous Integration
,” IEEE Trans. Compon., Packag. Manuf. Technol.
,
10
(8
), pp. 1296
–1303
.10.1109/TCPMT.2020.300496947.
Jangam
,
S. C.
,
Bajwa
,
A. A.
,
Mogera
,
U.
,
Ambhore
,
P.
,
Colosimo
,
T.
,
Chylak
,
B.
, and
Iyer
,
S.
, 2019
, “
Fine-Pitch (≤10 μm) Direct Cu-Cu Interconnects Using In-Situ Formic Acid Vapor Treatment
,” IEEE 69th Electronic Components and Technology Conference (ECTC
), Las Vegas, NV, May 28–31, pp. 620
–627
.https://ieeexplore.ieee.org/document/881117248.
Yang
,
W.
,
Akaike
,
M.
,
Fujino
,
M.
, and
Suga
,
T.
, 2012
, “
A New Combined Process of Formic Acid Pretreatment for Low-Temperature Bonding of Copper Electrodes
,” ECS Trans.
,
50
(7
), pp. 133
–138
.10.1149/MA2012-02/40/296649.
Yang
,
W. H.
,
Akaike
,
M.
, and
Suga
,
T.
, 2014
, “
Effect of Formic Acid Vapor In Situ Treatment Process on Cu low-Temperature Bonding
,” IEEE Trans. Compon. Packag. Manuf. Technol.
,
4
(6
), pp. 951
–956
.10.1109/TCPMT.2014.231576150.
Kim
,
T. H.
,
Howlader
,
M. M. R.
,
Itoh
,
T.
, and
Suga
,
T.
, 2003
, “
Room Temperature Cu-Cu Direct Bonding Using Surface Activated Bonding Method
,” J. Vac. Sci. Technol. A
,
21
(2
), pp. 449
–453
.10.1116/1.153771651.
Suga
,
T.
, and
Mu
,
F. W.
, 2018
, “
Surface Activated Bonding Method for Low Temperature Bonding
,” Seventh Electronic System-Integration Technology Conference (ESTC
), Dresden, Germany, Sept. 18–21, pp. 1
–4
.10.1109/ESTC.2018.854636752.
Park
,
H. S.
,
Seo
,
H. Y.
,
Kim
,
Y. H.
,
Park
,
S. M.
, and
Kim
,
S. E.
, 2021
, “
Low Temperature (260 °C) Solderless Cu-Cu Bonding for Fine-Pitch 3-D Packaging and Heterogeneous Integration
,” IEEE Trans. Compon., Packaging, Manuf. Technol.
,
11
(4
), pp. 565
–572
.10.1109/TCPMT.2021.306553153.
Park
,
M.
,
Baek
,
S.
,
Kim
,
S.
, and
Kim
,
S. E.
, 2015
, “
Argon Plasma Treatment on Cu Surface for Cu Bonding in 3D Integration and Their Characteristics
,” Appl. Surf. Sci.
,
324
, pp. 168
–173
.10.1016/j.apsusc.2014.10.09854.
Panigrahi
,
A. K.
,
Bonam
,
S.
,
Ghosh
,
T.
,
Singh
,
S. G.
, and
Vanjari
,
S. R. K.
, 2016
, “
Ultra-Thin Ti Passivation Mediated Breakthrough in High Quality Cu-Cu Bonding at Low Temperature and Pressure
,” Mater. Lett.
,
169
, pp. 269
–272
.10.1016/j.matlet.2016.01.12655.
Chou
,
T.-C.
,
Huang
,
S.-Y.
,
Chen
,
P.-J.
,
Hu
,
H.-W.
,
Liu
,
D.
,
Chang
,
C.-W.
,
Ni
,
T.-H.
,
Chen
,
C.-J.
,
Lin
,
Y.-M.
,
Chang
,
T.-C.
, and
Chen
,
K.-N.
, 2021
, “
Electrical and Reliability Investigation of Cu-to-Cu Bonding With Silver Passivation Layer in 3-D Integration
,” IEEE Trans. Compon. Packag. Manuf. Technol.
,
11
(1
), pp. 36
–42
.10.1109/TCPMT.2020.303736556.
Hong
,
Z. J.
,
Liu
,
D. M.
,
Hu
,
H. W.
,
Hsiung
,
C. K.
,
Cho
,
C. I.
,
Chen
,
C. H.
,
Liu
,
J. H.
,
Weng
,
M. W.
,
Hsu
,
M. P.
,
Hung
,
Y. C.
, and
Chen
,
K. N.
, 2023
, “
Low-Temperature Hybrid Bonding With High Electromigration Resistance Scheme for Application on Heterogeneous Integration
,” Appl. Surf. Sci.
,
610
, p. 155470
.10.1016/j.apsusc.2022.15547057.
Tan
,
C. S.
,
Lim
,
D. F.
,
Singh
,
S. G.
,
Goulet
,
S. K.
, and
Bergkvist
,
M.
, 2009
, “
Cu–Cu Diffusion Bonding Enhancement at Low Temperature by Surface Passivation Using Self-Assembled Monolayer of Alkane-Thiol
,” Appl. Phys. Lett.
,
95
(19
), p. 192108
.10.1063/1.326315458.
Peng
,
L.
,
Zhang
,
L.
,
Fan
,
J.
,
Li
,
H. Y.
,
Lim
,
D. F.
, and
Tan
,
C. S.
, 2012
, “
Ultrafine Pitch (6 μm) of Recessed and Bonded Cu-Cu Interconnects by Three-Dimensional Wafer Stacking
,” IEEE Electron Device Lett.
,
33
(12
), pp. 1747
–1749
.10.1109/LED.2012.221827359.
Hung
,
T. H.
,
Kang
,
T. C.
,
Mao
,
S. Y.
,
Chou
,
T. C.
,
Hu
,
H. W.
,
Chiu
,
H. Y.
,
Shih
,
C. L.
, and
Chen
,
K. N.
, 2021
, “
Investigation of Wet Pretreatment to Improve Cu-Cu Bonding for Hybrid Bonding Applications
,” IEEE 71st Electronic Components and Technology Conference (ECTC
), San Diego, CA, June 1–July 4, pp. 700
–705
.10.1109/ECTC32696.2021.0012160.
Qiu
,
L. J.
,
Ikeda
,
A.
,
Noda
,
K.
,
Nakai
,
S.
, and
Asano
,
T.
, 2013
, “
Room-Temperature Cu Microjoining With Ultrasonic Bonding of Cone-Shaped Bump
,” Japanese J. Appl. Phys.
,
52
(4S
), pp. 1
–5
.10.7567/JJAP.52.04CB1061.
Du
,
L.
,
Shi
,
T. L.
,
Su
,
L.
,
Tang
,
Z. R.
, and
Liao
,
G. L.
, 2017
, “
Hydrogen Thermal Reductive Cu Nanowires in Low Temperature Cu-Cu Bonding
,” J. Micromech. Microeng.
,
27
(7
), pp. 075019
–9
.10.1088/1361-6439/aa74fb62.
Liu
,
Z. Y.
,
Cai
,
J.
,
Wang
,
Q.
,
Tan
,
L.
, and
Hu
,
Y.
, 2015
, “
Low Temperature Cu-Cu Bonding Using Ag Nanostructure for 3D Integration
,” ECS Solid State Lett.
,
4
(10
), pp. P75
–P76
.10.1149/2.0061510ssl63.
Kern
,
W.
, 1993
, Handbook of Semiconductor Wafer Cleaning Technology: Science, Technology, and Applications
,
Noyes Publications
,
New York,
pp. 113
–115
.64.
Gösele
,
U.
,
Stenzel
,
H.
,
Martini
,
T.
,
Steinkirchner
,
J.
,
Conrad
,
D.
, and
Scheerschmidt
,
K.
, 1995
, “
Self-Propagating Room-Temperature Silicon Wafer Bonding in Ultrahigh Vacuum
,” Appl. Phys. Lett.
,
67
(24
), pp. 3614
–3616
.10.1063/1.11533565.
GÖsele
,
U.
,
Tong
,
Q. Y.
,
Schumacher
,
A.
,
Kräuter
,
G.
,
Kräuter
,
G.
,
Reiche
,
M.
,
Plößl
,
A.
,
Kopperschmidt
,
P.
,
Lee
,
T. H.
, and
Kim
,
W. J.
, 1999
, “
Wafer Bonding for Microsystems Technologies
,” Sens. Actuators A: Phys.
,
74
(1–3
), pp. 161
–168
.10.1016/S0924-4247(98)00310-066.
Tong
,
Q. Y.
, and
GÖsele
,
U.
, 1996
, “
A Model of Low‐Temperature Wafer Bonding and Its Applications
,” J. Electrochem. Soc.
,
143
(5
), pp. 1773
–1779
.10.1149/1.183671567.
Liao
,
G. L.
,
Shi
,
T. L.
,
Lin
,
X. H.
, and
Ma
,
Z.
, 2010
, “
Effect of Surface Characteristic on Room-Temperature Silicon Direct Bonding
,” Sens. Actuators A Phys.
,
158
(2
), pp. 335
–341
.10.1016/j.sna.2010.01.02568.
Zhao
,
Y. L.
,
Song
,
Z. J.
,
Li
,
Y.
,
San
,
H. S.
, and
Yu
,
Y. X.
, 2012
, “
Low Temperature Wafer Direct Bonding Using Wet Chemical Treatment
,” Adv. Mater. Res.
,
482-484
, pp. 2381
–2384
.10.4028/www.scientific.net/AMR.482-484.238169.
He
,
R.
,
Fujino
,
M.
,
Yamauchi
,
A.
, and
Suga
,
T.
, 2016
, “
Combined Surface Activated Bonding Technique for Hydrophilic SiO2-SiO2 and Cu-Cu Bonding
,” ECS Trans.
,
75
(9
), pp. 117
–128
.10.1149/07509.0117ecst70.
Enquist
,
P.
,
Fountain
,
G.
,
Petteway
,
C.
,
Hollingsworth
,
A.
, and
Grady
,
H.
, 2009
, “
Low Cost of Ownership Scalable Copper Direct Bond Interconnect 3D IC Technology for Three Dimensional Integrated Circuit Applications
,” IEEE International Conference on 3D System Integration
, San Francisco, CA, Sept. 28–30, pp. 1
–6
.10.1109/3DIC.2009.530653371.
Sierra-Suarez
,
J. A.
,
Mudrick
,
J. P.
,
Sennett
,
C. C.
,
Friedmann
,
T. A.
,
Arterburn
,
S.
,
Jordan
,
M. B.
,
Caravello
,
L.
,
Gutierrez
,
J. E.
, and
Henny
,
M. D.
, 2020
, “
Strategies Relating to CMP for Die to Wafer Interconnects Utilizing Hybrid Direct Bonding
,” IEEE 70th Electronic Components and Technology Conference (ECTC
), Orlando, FL,
June 3–30, pp. 1950
–1956
.10.1109/ECTC32862.2020.0030472.
Mudrick
,
J. P.
,
Sierra-Suarez
,
J. A.
,
Jordan
,
M. B.
,
Friedmann
,
T. A.
,
Jarecki
,
R.
, and
Henny
,
M. D.
, 2019
, “
Sub-10μm Pitch Hybrid Direct Bond Interconnect Development for Die-to-Die Hybridization
,” IEEE 69th Electronic Components and Technology Conference (ECTC
), Las Vegas, NV, May 28–31, pp. 648
–654
.10.1109/ECTC.2019.0010373.
He
,
R.
,
Fujino
,
M.
,
Yamauchi
,
A.
,
Wang
,
Y. H.
, and
Suga
,
T.
, 2016
, “
Combined Surface Activated Bonding Technique for Low-Temperature Cu/Dielectric Hybrid Bonding
,” J. Solid State Sci. Technol.
,
5
(7
), pp. 419
–424
.10.1149/2.0201607jss74.
Seo
,
H. K.
,
Kim
,
S. E.
,
Kim
,
G.
,
Park
,
H. S.
, and
Park
,
Y. B.
, 2020
, “
Effects of Two-Step Plasma Treatment on Cu and SiO2 Surfaces for 3D Bonding Applications
,” IEEE 70th Electronic Components and Technology Conference (ECTC
), Orlando, FL, June 3–30, pp. 677
–1683
.10.1109/ECTC32862.2020.0026375.
Rauer
,
C.
,
Moriceau
,
H.
,
Fournel
,
F.
,
Charvet
,
A. M.
,
Morales
,
C.
,
Rochat
,
N.
,
Vandroux
,
L.
,
Rieutord
,
F.
,
Mccormick
,
T.
, and
Radu
,
I.
, 2012
, “
Treatments of Deposited SiOx Surfaces Enabling Low Temperature Direct Bonding
,” ECS Trans.
,
50
(7
), pp. 287
–295
.10.1149/05007.0287ecst76.
Tong
,
Q. Y.
, 2006
, “
Room Temperature Metal Direct Bonding
,” Appl. Phys. Lett.
,
89
(18
), p. 182101
.10.1063/1.236766377.
Goto
,
M.
,
Hagiwara
,
K.
,
Iguchi
,
Y.
,
Ohtake
,
H.
,
Saraya
,
T.
,
Higurashi
,
E.
,
Toshiyoshi
,
H.
, and
Hiramoto
,
T.
, 2014
, “
3D Silicon on Insulator Integrated Circuits With NFET and PFET on Separate Layers Using Au/SiO2 Hybrid Bonding
,” IEEE Trans. Electron Dev.
,
61
(8
), pp. 2886
–2892
.10.1109/TED.2014.233197578.
Zheng
,
X. S.
,
Yan
,
X.
,
Song
,
Z. J.
, and
San
,
H. S.
, 2011
, “
Direct Al-Al Contact in Silicon- pyrex7740 Anodic Bonding for Hermetic Package and Electrical Interconnecting
,” IEEE International Conference on Nano/Micro Engineered and Molecular Systems (NEMS
), Kaohsiung, Taiwan, Feb. 20–23, pp. 764
–767
.10.1109/NEMS.2011.601746679.
Lin
,
H.
,
Stevenson
,
J. T. M.
,
Gundlach
,
A. M.
,
Dunare
,
C. C.
, and
Walton
,
A. J.
, 2008
, “
Direct Al-Al Contact Using Low Temperature Wafer Bonding for Integrating MEMS and CMOS Devices
,” Microelectron. Eng.
,
85
(5–6
), pp. 1059
–1061
.10.1016/j.mee.2008.01.05480.
Kang
,
Q. S.
,
Li
,
G.
,
Li
,
Z. D.
,
Tian
,
Y. H.
, and
Wang
,
C. X.
, 2023
, “
Surface Co-Hydrophilization Via Ammonia Inorganic Strategy for Low-Temperature Cu/SiO2 Hybrid Bonding
,” J. Mater. Sci. Technol.
,
149
, pp. 161
–166
.10.1016/j.jmst.2022.12.01281.
Wlanis
,
T.
,
Hammer
,
R.
,
Ecker
,
W.
,
Lhostis
,
S.
,
Sart
,
C.
,
Garreignot
,
S. G.
,
Rebhan
,
B.
, and
Maier
,
G. A.
, 2018
, “
Cu-SiO+ Hybrid Bonding Simulation Including Surface Roughness and Viscoplastic Material Modeling: A Critical Comparison of 2D and 3D Modeling Approach
,” Microelectron. Reliab.
,
86
, pp. 1
–9
.10.1016/j.microrel.2018.05.00582.
Shigetou
,
A.
, and ,
and Suga
,
T.
, 2012
, “
Vapor-Assisted Surface Activation Method for Hmo- and Heterogeneous Bonding of Cu, SiO2, and Polyimide at 150 °C and Atmospheric Pressure
,” J. Electron. Mater.
,
41
(8
), pp. 2274
–2280
.10.1007/s11664-012-2091-983.
Liu
,
F.
,
Yu
,
R. R.
,
Young
,
A. M.
,
Doyle
,
J. P.
,
Wang
,
X.
,
Shi
,
L.
,
Chen
,
K. N.
,
Li
,
X.
,
Dipaola
,
D. A.
,
Brown
,
D.
,
Ryan
,
C. T.
,
Hagan
,
J. A.
,
Wong
,
K. H.
,
Lu
,
M.
,
Gu
,
X.
,
Klymko
,
N. R.
,
Perfecto
,
E. D.
,
Merryman
,
A. G.
,
Kelly
,
K. A.
,
Purushothaman
,
S.
,
Koester
,
S. J.
,
Wisnieff
,
R.
, and
Haensch
,
W.
, 2008
, “
A 300-mm Wafer-Level Three-Dimensional Integration Scheme Using Tungsten Through-Silicon Via and Hybrid Cu-Adhesive Bonding
,” 2008 IEEE International Electron Devices Meeting (IEDM
), San Francisco, CA, Dec. 15–17, pp. 1
–4
.10.1109/IEDM.2008.479676284.
Nimura
,
M.
,
Mizuno
,
J.
,
Shigetou
,
A.
,
Sakuma
,
K.
,
Ogino
,
K.
,
Enomoto
,
T.
, and
Shoji
,
S.
, 2013
, “
Study on Hybrid Au-Underfill Resin Bonding Method With Lock-and-Key Structure for 3D Integration
,” IEEE Trans. Compon., Packag. Manuf. Technol.
,
3
(4
), pp. 558
–565
.10.1109/TCPMT.2013.224056685.
Takeda
,
K.
, and
Aoki
,
M.
, 2014
, “
3D Integration Technology Using Hybrid Bonding and Via-Last TSV Process
,” IEEE International Interconnect Technology Conference
, San Hose, CA, May 20–23, pp. 211
–214
.10.1109/IITC.2014.683187286.
Chery
,
E.
,
Fohn
,
C.
,
Messemaeker
,
J. D.
, and
Beyne
,
E.
, 2023
, “
Reliability Challenges in Advanced 3D Technologies: The Case of Through Silicon Vias and SiCN–SiCN Wafer-to-Wafer Hybrid-Bonding Technologies
,” IEEE Trans. Device Mater. Reliab.
,
23
(4
), pp. 615
–622
.10.1109/TDMR.2023.332766487.
Chiu
,
W. L.
,
Lee
,
O. H.
,
Kuo
,
T. Y.
,
Lo
,
J. Y. J.
,
Shih
,
C. L.
,
Chiu
,
H. C.
, and
Chang
,
H. H.
, 2023
, “
Low Temperature and Fine Pitch Nanocrystalline Cu/SiCN Wafer-to-Wafer Hybrid Bonding
,” IEEE 73rd Electronic Components and Technology Conference (ECTC
), Orlando, FL, May 30–June 2, pp. 1105
–1109
.10.1109/ECTC51909.2023.0018988.
Pai
,
C. W.
,
Uchida
,
K.
,
Tada
,
M.
, and
Ishikuro
,
H.
, 2024
, “
Design and Analysis of a High-Speed Low-Power Comparator With Regeneration Enhancement and Through Current Suppression Techniques From 4 K to 300 K in 65-nm Cryo-CMOS
,” Microelectron. J.
,
144
, p. 106066
.10.1016/j.mejo.2023.10606689.
Byon
,
C.
,
Choo
,
K.
, and
Kim
,
S. J.
, 2011
, “
Experimental and Analytical Study on Chip Hot Spot Temperature
,” Int. J. Heat Mass Transfer
,
54
(9–10
), pp. 2066
–2072
.10.1016/j.ijheatmasstransfer.2010.12.02290.
Men
,
Z. C.
,
Chen
,
W. J.
,
Hu
,
Q.
, and
Liu
,
S. T.
, 2024
, “
Numerical and Experimental Investigation of a Multi-Channel Heat Sink Distribution Header Designed by Topology Optimization
,” Appl. Therm. Eng.
,
238
, p. 122008
.10.1016/j.applthermaleng.2023.12200891.
Mathew
,
V. K.
, and
Hotta
,
T. K.
, 2021
, “
Performance Enhancement of High Heat Generating IC Chips Using Paraffin Wax Based Mini-channels–A Combined Experimental and Numerical Approach
,” Int. J. Therm. Sci.
,
164
, p. 106865
.10.1016/j.ijthermalsci.2021.10686592.
Zhao
,
Y.
,
Zhang
,
Z. G.
,
Cai
,
C. Y.
,
Zhou
,
Z. Z.
,
Ling
,
Z. Y.
, and
Fang
,
X. M.
, 2023
, “
Vertically Aligned Carbon Fibers-Penetrated Phase Change Thermal Interface Materials With High Thermal Conductivity for Chip Heat Dissipation
,” Appl. Therm. Eng.
,
230
, p. 120807
.10.1016/j.applthermaleng.2023.12080793.
Ding
,
S. C.
,
Fan
,
J. F.
,
He
,
D. Y.
,
Cai
,
L. F.
,
Zeng
,
X. L.
,
Ren
,
L. L.
,
Du
,
G. P.
,
Zeng
,
X. L.
, and
Sun
,
R.
, 2022
, “
High Thermal Conductivity and Remarkable Damping Composite Gels as Thermal Interface Materials for Heat Dissipation of Chip
,” Chip
,
1
(2
), p. 100013
.10.1016/j.chip.2022.10001394.
Bianco
,
N.
,
Cherella
,
N.
,
Fragnito
,
A.
,
Iasiello
,
M.
, and
Mauro
,
G. M.
, 2024
, “
Multi-Material Topology Optimization of Innovative Microchannel Heat Sinks Equipped With Metal Foams
,” Int. J. Heat Mass Transfer
,
222
, p. 125201
.10.1016/j.ijheatmasstransfer.2024.12520195.
Chen
,
S.
,
Cheng
,
W. T.
,
Huang
,
Z. J.
,
Wang
,
R. B.
,
Gu
,
Y. Q.
,
Zhang
,
Z. H.
,
Wang
,
J. T.
, and
Kan
,
J. W.
, 2023
, “
A Miniature Atomization-Air-Cooled Heat Sink for Electronic Chips
,” Int. J. Therm. Sci.
,
190
, p. 108305
.10.1016/j.ijthermalsci.2023.10830596.
Hu
,
H. Z.
,
Chen
,
C. M.
,
Li
,
C.
, and
Pan
,
M. Q.
, 2023
, “
Experimental Investigation of Roll Bond Liquid Cooling Plates for Server Chip Heat Dissipation
,” Appl. Therm. Eng.
,
226
, p. 120284
.10.1016/j.applthermaleng.2023.12028497.
Hou
,
L.
,
Chery
,
E.
,
Croes
,
K.
,
Tierno
,
D.
,
Chew
,
S. A.
,
Chen
,
Y.
,
Rakbin
,
P.
, and
Beyne
,
E.
, 2022
, “
Reliability Investigation of W2W Hybrid Bonding Interface: Breakdown Voltage and Leakage Mechanism
,” 2022 IEEE International Reliability Physics Symposium (IRPS
), Dallas, TX, Mar. 27–31, pp. 4C.2-1–4C.2-6.10.1109/IRPS48227.2022.976447898.
Yang
,
Z. W.
,
Zhang
,
D. H.
,
Li
,
C. Y.
,
Tan
,
C. M.
, and
Prasad
,
K.
, 2004
, “
Barrier Layer Effects on Reliabilities of Copper Metallization
,” Thin Solid Films
,
462-463
, pp. 288
–291
.10.1016/j.tsf.2004.05.10199.
Howlader
,
M. M. R.
,
Kibria
,
M. G.
,
Zhang
,
F.
, and
Kim
,
M. J.
, 2010
, “
Hybrid Plasma Bonding for Void-Free Strong Bonded Interface of Silicon/Glass at 200 °C
,” Talanta
,
82
(2
), pp. 508
–515
.10.1016/j.talanta.2010.05.001100.
Messemaeker
,
J. D.
,
Kim
,
S. W.
,
Stucchi
,
M.
,
Beyer
,
G.
, and
Croes
,
K.
, 2018
, “
Electromigration Behavior of Cu/SiCN to Cu/SiCN Hybrid Bonds for 3D Integrated Circuits
,” International Conference on Solid State Devices and Materials
,
Tokyo, Japan
, Sept. 9–13, pp. 449
–450
.https://confit.atlas.jp/guide/event-img/ssdm2018/G-1-04/public/pdf_archive#:~:text=A%20new%20electromigration%20mechanism%20for,to%20the%20electron%20flow%20direction101.
