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Journal Articles

Experimental Characterization of the Vertical and Lateral Heat Transfer in Three-Dimensional Stacked Die Packages

Herman Oprins, Vladimir Cherman, Geert Van der Plas, Joeri De Vos, Eric Beyne

Publisher: ASME

J. Electron. Packag. March 2016, 138(1): 010902.

Paper No: EP-15-1090

https://doi.org/10.1115/1.4032346

Published Online: March 10, 2016

View Article titled, Experimental Characterization of the Vertical and Lateral Heat Transfer in Three-Dimensional Stacked Die Packages

Topics: Energy dissipation, Experimental characterization, Heat transfer, Heating, Thermal conductivity, Thermal resistance, Thermal analysis, Cooling, Temperature, Temperature profiles

Journal Articles

Fabrication of Miniature CMOS Image Sensor Using Novel Glass Cover Chip Packaging Technique

Chuen-Ching Wang, Yao-Ting Ye, Jing-Fung Lin

Publisher: ASME

J. Electron. Packag. December 2009, 131(4): 041009.

https://doi.org/10.1115/1.4000363

Published Online: November 12, 2009

View Article titled, Fabrication of Miniature CMOS Image Sensor Using Novel Glass Cover Chip Packaging Technique

Topics: Adhesives, Complementary metal oxide semiconductors, Energy dissipation, Glass, Packaging, Sensors, Taguchi methods, Temperature, Bonding, Heat

Journal Articles

On-Wafer Capacitors Under Mechanical Stress

Päivi H. Karjalainen, Pekka Heino

Publisher: ASME

J. Electron. Packag. September 2007, 129(3): 287–290.

https://doi.org/10.1115/1.2753918

Published Online: August 24, 2006

View Article titled, On-Wafer Capacitors Under Mechanical Stress

Topics: Capacitors, Semiconductor wafers, Stress, Complementary metal oxide semiconductors

Journal Articles

A Scalable Multi-Functional Thermal Test Chip Family: Design and Evaluation

Zs. Benedek, B. Courtois, G. Farkas, E. Kolla´r, S. Mir, A. Poppe, M. Rencz, V. Sze´kely, K. Torki

Publisher: ASME

J. Electron. Packag. December 2001, 123(4): 323–330.

https://doi.org/10.1115/1.1389846

Published Online: June 2, 2001

View Article titled, A Scalable Multi-Functional Thermal Test Chip Family: Design and Evaluation

Topics: Design, Sensors, Temperature, Energy dissipation, Transients (Dynamics), Packaging, Resistors, Composite materials, Complementary metal oxide semiconductors

Journal Articles

Packaging Architecture Considerations of High Density Multi-Chip Electronic Packages Via System Optimization

J. P. Krusius

Publisher: ASME

J. Electron. Packag. September 1990, 112(3): 267–271.

https://doi.org/10.1115/1.2904377

Published Online: September 1, 1990

View Article titled, Packaging Architecture Considerations of High Density Multi-Chip Electronic Packages Via System Optimization

Topics: Density, Electronic packages, Optimization, Packaging, Complementary metal oxide semiconductors, Cycles, Design, Mechanical engineers, Printed circuit boards, Simulated annealing

Journal citation

NARROW

Experimental Characterization of the Vertical and Lateral Heat Transfer in Three-Dimensional Stacked Die Packages

Fabrication of Miniature CMOS Image Sensor Using Novel Glass Cover Chip Packaging Technique

On-Wafer Capacitors Under Mechanical Stress

A Scalable Multi-Functional Thermal Test Chip Family: Design and Evaluation

Packaging Architecture Considerations of High Density Multi-Chip Electronic Packages Via System Optimization

ASME Journals

ASME Conference Proceedings

ASME eBooks

Resources

Opportunities

Experimental Characterization of the Vertical and Lateral Heat Transfer in Three-Dimensional Stacked Die Packages

Fabrication of Miniature CMOS Image Sensor Using Novel Glass Cover Chip Packaging Technique

On-Wafer Capacitors Under Mechanical Stress

A Scalable Multi-Functional Thermal Test Chip Family: Design and Evaluation

Packaging Architecture Considerations of High Density Multi-Chip Electronic Packages Via System Optimization

ASME Journals

ASME Conference Proceedings

ASME eBooks

Resources

Opportunities

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