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John H. Lau
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Journal Articles

Co-Packaged Optics—Heterogeneous Integration of Photonic Integrated Circuits and Electronic Integrated Circuits

John H. Lau
Journal: Journal of Electronic Packaging
Publisher: ASME
Article Type: Research-Article
J. Electron. Packag. March 2025, 147(1): 011004.
Paper No: EP-24-1055
https://doi.org/10.1115/1.4065667
Published Online: June 20, 2024
View Article titled, Co-Packaged Optics—Heterogeneous Integration of Photonic Integrated Circuits and Electronic Integrated Circuits
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Topics: Bridges (Structures), Glass, Integrated circuits, Optics, Switches
Journal Articles

Hybrid Substrates for Heterogeneous Integration

John H. Lau, Gary Chang-Fu Chen, Channing Cheng-Lin Yang, Vincent Teng, Andy Yan-Jia Peng, Jones Yu-Cheng Huang, Hsing-Ning Liu, Y. H. Chen, Tzyy-Jang Tseng, Ming Li
Journal: Journal of Electronic Packaging
Publisher: ASME
Article Type: Research-Article
J. Electron. Packag. June 2024, 146(2): 021001.
Paper No: EP-23-1025
https://doi.org/10.1115/1.4062993
Published Online: August 11, 2023
View Article titled, Hybrid Substrates for Heterogeneous Integration
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Topics: Bonding, Metals, Solder joints, Reliability, Dielectric materials
Journal Articles

Recent Advances and Trends in Chiplet Design and Heterogeneous Integration Packaging

John H. Lau
Journal: Journal of Electronic Packaging
Publisher: ASME
Article Type: Review Articles
J. Electron. Packag. March 2024, 146(1): 010801.
Paper No: EP-23-1022
https://doi.org/10.1115/1.4062529
Published Online: June 23, 2023
View Article titled, Recent Advances and Trends in Chiplet Design and Heterogeneous Integration Packaging
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Topics: Bonding, Bridges (Structures), Design, Packaging
Proceedings Papers

Creep Analysis of Wafer Level Chip Scale Package (WLCSP) With 96.5Sn-3.5Ag and 100In Lead-Free Solder Joints and Microvia Build-Up Printed Circuit Board

John H. Lau, Stephen H. Pan, Chris Chang
Proc. ASME. IMECE2000, Packaging of Electronic and Photonic Devices, 79-89, November 5–10, 2000
Publisher: American Society of Mechanical Engineers
Paper No: IMECE2000-2249
https://doi.org/10.1115/IMECE2000-2249
View Paper titled, Creep Analysis of Wafer Level Chip Scale Package (WLCSP) With 96.5Sn-3.5Ag and 100In Lead-Free Solder Joints and Microvia Build-Up Printed Circuit Board
Open the PDF for Creep Analysis of Wafer Level Chip Scale Package (WLCSP) With 96.5Sn-3.5Ag and 100In Lead-Free Solder Joints and Microvia Build-Up Printed Circuit Board in another window
Topics: Creep, Lead-free solders, Printed circuit boards, Semiconductor wafers, Alloys, Shear (Mechanics), Shear stress, Solder joints, Solders, Constitutive equations
Proceedings Papers

Nonlinear-Time-Dependent Analysis of Micro Via-In-Pad Substrates for Solder Bumped Flip Chip Applications

John H. Lau, S. W. Ricky Lee, Stephen H. Pan, Chris Chang
Proc. ASME. IMECE2000, Packaging of Electronic and Photonic Devices, 135-144, November 5–10, 2000
Publisher: American Society of Mechanical Engineers
Paper No: IMECE2000-2255
https://doi.org/10.1115/IMECE2000-2255
View Paper titled, Nonlinear-Time-Dependent Analysis of Micro Via-In-Pad Substrates for Solder Bumped Flip Chip Applications
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Topics: Flip-chip, Flip-chip devices, Solders, Creep, Solder joints, Cross section (Physics), Design, Printed circuit board assemblies, Printed circuit boards, Reliability
Proceedings Papers

A New Thermal-Fatigue Life Prediction Model for Wafer Level Chip Scale Package (WLCSP) Solder Joints

John H. Lau, Stephen H. Pan, Chris Chang
Proc. ASME. IMECE2000, Packaging of Electronic and Photonic Devices, 91-101, November 5–10, 2000
Publisher: American Society of Mechanical Engineers
Paper No: IMECE2000-2250
https://doi.org/10.1115/IMECE2000-2250
View Paper titled, A New Thermal-Fatigue Life Prediction Model for Wafer Level Chip Scale Package (WLCSP) Solder Joints
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Topics: Fatigue, Semiconductor wafers, Solder joints, Fracture (Materials), Corners (Structural elements), Creep, Cycles, Density, Finite element methods, Fracture mechanics
Journal Articles

State of the Art of Lead-Free Solder Joint Reliability

John H. Lau
Journal: Journal of Electronic Packaging
Publisher: ASME
Article Type: Review Articles
J. Electron. Packag. June 2021, 143(2): 020803.
Paper No: EP-20-1059
https://doi.org/10.1115/1.4048037
Published Online: September 3, 2020
View Article titled, State of the Art of Lead-Free Solder Joint Reliability
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Topics: Alloys, Creep, Failure, Reliability, Solder joints, Solders, Temperature, Viscoplasticity, Lead-free solders, Stress
Journal Articles

Recent Advances and Trends in Fan-Out Wafer/Panel-Level Packaging

John H. Lau
Journal: Journal of Electronic Packaging
Publisher: ASME
Article Type: Review Articles
J. Electron. Packag. December 2019, 141(4): 040801.
Paper No: EP-18-1088
https://doi.org/10.1115/1.4043341
Published Online: May 17, 2019
View Article titled, Recent Advances and Trends in Fan-Out Wafer/Panel-Level Packaging
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Topics: Packaging, Semiconductor wafers, Solders, Warping, Etching
Journal Articles

Recent Advances and New Trends in Flip Chip Technology

John H. Lau
Journal: Journal of Electronic Packaging
Publisher: ASME
Article Type: Review Articles
J. Electron. Packag. September 2016, 138(3): 030802.
Paper No: EP-16-1052
https://doi.org/10.1115/1.4034037
Published Online: July 25, 2016
View Article titled, Recent Advances and New Trends in Flip Chip Technology
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Topics: Bonding, Flip-chip, Flip-chip assemblies, Flip-chip devices, Manufacturing, Semiconductor wafers, Solders, Columns (Structural), Silicon, Packaging
Journal Articles

Overview and Outlook of Three-Dimensional Integrated Circuit Packaging, Three-Dimensional Si Integration, and Three-Dimensional Integrated Circuit Integration

John H. Lau
Journal: Journal of Electronic Packaging
Publisher: ASME
Article Type: Review Articles
J. Electron. Packag. December 2014, 136(4): 040801.
Paper No: EP-14-1068
https://doi.org/10.1115/1.4028629
Published Online: October 15, 2014
View Article titled, Overview and Outlook of Three-Dimensional Integrated Circuit Packaging, Three-Dimensional Si Integration, and Three-Dimensional Integrated Circuit Integration
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Topics: Integrated circuit packaging, Manufacturing, Semiconductor wafers, Supply chains, Wire bonding, Packaging, Integrated circuits, Bonding
Proceedings Papers

Embedded 3D Hybrid IC Integration System-in-Package (SiP) for Opto-Electronic Interconnects in Organic Substrates

John H. Lau, M. S. Zhang, S. W. Ricky Lee
Proc. ASME. IMECE2010, Volume 4: Electronics and Photonics, 129-136, November 12–18, 2010
Publisher: American Society of Mechanical Engineers
Paper No: IMECE2010-40974
https://doi.org/10.1115/IMECE2010-40974
View Paper titled, Embedded 3D Hybrid IC Integration System-in-Package (SiP) for Opto-Electronic Interconnects in Organic Substrates
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Topics: Cavities, Circuits, Continuum mechanics, Engineering simulation, Flat heat pipes, Heat, Heat transfer, Lasers, Optical instruments, Optical interconnections
Proceedings Papers

Thermal-Enhanced and Cost-Effective 3D IC Integration With TSV (Through-Silicon Via) Interposers for High-Performance Applications

John H. Lau, Y. S. Chan, S. W. Ricky Lee
Proc. ASME. IMECE2010, Volume 4: Electronics and Photonics, 137-144, November 12–18, 2010
Publisher: American Society of Mechanical Engineers
Paper No: IMECE2010-40975
https://doi.org/10.1115/IMECE2010-40975
View Paper titled, Thermal-Enhanced and Cost-Effective 3D IC Integration With TSV (Through-Silicon Via) Interposers for High-Performance Applications
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Topics: Silicon, Flat heat pipes, Heat sinks, Creep, Engineering simulation, Flip-chip devices, Heat transfer, Reliability, Simulation, Structural design
Proceedings Papers

State-of-the-Art and Trends in Through-Silicon Via (TSV) and 3D Integrations

John H. Lau
Proc. ASME. IMECE2010, Volume 4: Electronics and Photonics, 69-78, November 12–18, 2010
Publisher: American Society of Mechanical Engineers
Paper No: IMECE2010-37783
https://doi.org/10.1115/IMECE2010-37783
View Paper titled, State-of-the-Art and Trends in Through-Silicon Via (TSV) and 3D Integrations
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Topics: Silicon, Integrated circuit packaging, Circuits
Proceedings Papers

Effects of TSV Interposer on the Reliability of 3D IC Integration SiP

John H. Lau, Xiaowu Zhang
Proc. ASME. InterPACK2011, ASME 2011 Pacific Rim Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Systems, MEMS and NEMS: Volume 1, 65-73, July 6–8, 2011
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2011-52205
https://doi.org/10.1115/IPACK2011-52205
View Paper titled, Effects of TSV Interposer on the Reliability of 3D IC Integration SiP
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Topics: Reliability, Corners (Structural elements), Creep, Cycles, Density, Failure analysis, Silicon, Solder joints, Stress, System-in-package
Proceedings Papers

The Most Cost-Effective Integrator (TSV Interposer) for 3D IC Integration System-in-Package (SiP)

John H. Lau
Proc. ASME. InterPACK2011, ASME 2011 Pacific Rim Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Systems, MEMS and NEMS: Volume 1, 53-63, July 6–8, 2011
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2011-52189
https://doi.org/10.1115/IPACK2011-52189
View Paper titled, The Most Cost-Effective Integrator (TSV Interposer) for 3D IC Integration System-in-Package (SiP)
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Topics: System-in-package, Polishing equipment, Reliability, Thermal management
Journal Articles

Embedded Three-Dimensional Hybrid Integrated Circuit Integration System-in-Package With Through-Silicon Vias for Opto-Electronic Interconnects in Organic Substrates/Printed Circuit Boards

John H. Lau, M. S. Zhang, S. W. Ricky Lee
Journal: Journal of Electronic Packaging
Publisher: ASME
Article Type: Research Papers
J. Electron. Packag. September 2011, 133(3): 031010.
https://doi.org/10.1115/1.4004861
Published Online: September 26, 2011
View Article titled, Embedded Three-Dimensional Hybrid Integrated Circuit Integration System-in-Package With Through-Silicon Vias for Opto-Electronic Interconnects in Organic Substrates/Printed Circuit Boards
Open the PDF for Embedded Three-Dimensional Hybrid Integrated Circuit Integration System-in-Package With Through-Silicon Vias for Opto-Electronic Interconnects in Organic Substrates/Printed Circuit Boards in another window
Topics: Design, Polymers, System-in-package, Waveguides, Simulation, Printed circuit boards, Optical interconnections, Integrated circuits, Engineering simulation, Heat
Proceedings Papers

Effects of TSV (Through Silicon Via) Interposer/Chip on the Thermal Performances of 3D IC Packaging

John H. Lau, Gong Yue Tang, Germaine Yen Yi Hoe, Xiao Wu Zhang, Tai Chong Chai, Pinjala Damaruganath, Kripesh Vaidyanathan
Proc. ASME. InterPACK2009, ASME 2009 InterPACK Conference, Volume 1, 67-74, July 19–23, 2009
Publisher: American Society of Mechanical Engineers
Paper No: InterPACK2009-89380
https://doi.org/10.1115/InterPACK2009-89380
View Paper titled, Effects of TSV (Through Silicon Via) Interposer/Chip on the Thermal Performances of 3D IC Packaging
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Topics: Integrated circuit packaging, Silicon, Computational fluid dynamics, Aluminum, Copper, Design, Fillers (Materials), Heat transfer, Junctions, Polymers
Proceedings Papers

Stress and Deflection Analysis of a Glass Window (Circular Plate) Elastically Restrained Along Its Edge in a Photonic Device

John H. Lau, Steve Erasmus, Yida Zou
Proc. ASME. IMECE2002, Electronic and Photonic Packaging, Electrical Systems Design and Photonics, and Nanotechnology, 165-172, November 17–22, 2002
Publisher: American Society of Mechanical Engineers
Paper No: IMECE2002-39491
https://doi.org/10.1115/IMECE2002-39491
View Paper titled, Stress and Deflection Analysis of a Glass Window (Circular Plate) Elastically Restrained Along Its Edge in a Photonic Device
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Topics: Deflection, Glass, Photonic equipment, Stress, Elastic constants, Geometry, Pressure, Temperature, Design, Double refraction
Journal Articles

Reliability of Lead-Free Solder Joints

John H. Lau
Journal: Journal of Electronic Packaging
Publisher: ASME
Article Type: Technical Briefs
J. Electron. Packag. September 2006, 128(3): 297–301.
https://doi.org/10.1115/1.2229234
Published Online: July 26, 2006
View Article titled, Reliability of Lead-Free Solder Joints
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Topics: Lead-free solders, Reliability, Solder joints, Solders
Journal Articles

3D Nonlinear Stress Analysis of Tin Whisker Initiation on Lead-Free Components

John H. Lau, Stephen H. Pan
Journal: Journal of Electronic Packaging
Publisher: ASME
Article Type: Technical Briefs
J. Electron. Packag. December 2003, 125(4): 621–624.
https://doi.org/10.1115/1.1604805
Published Online: December 15, 2003
View Article titled, 3D Nonlinear Stress Analysis of Tin Whisker Initiation on Lead-Free Components
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Topics: Boundary-value problems, Compressive stress, Copper, Finite element analysis, Stress, Stress analysis (Engineering), Tin, Chemical reactions, Displacement, Materials properties